admission@niet.co.in
+91-8010-500-700
Experience
12.5 Years
Mr. Jaya Nidhi Vashishtha received B.Tech. degree in Electronics and Communication Engineering (ECE) in 2009 and M.Tech. degree in VLSI design from NIT, Jalandhar in 2011.
He has 12.5 years of experience in teaching. His areas of work include Full custom VLSI design, Transistor based Circuit simulations, post-layout simulations using various tools such as Cadence Virtuso and Layout XL, Implementation of various circuits such as amplifiers.
Research
Analog VLSI Design
Key Publications
